Effects of the grain boundary protrusion position on the off-state current of polycrystalline silicon thin-film transistors

We report the effects of grain boundary (GB) protrusion on off-state current (IOFF) p-channel polycrystalline silicon thin-film transistors by using three-dimensional technology computer-aided design (TCAD) simulation. found that IOFF at a high drain bias, VDS = −10 V, varies more than 10 times as position GB changes, whereas it less two if has no protrusion, i.e. flat surface. The TCAD analysis showed was mainly caused band-to-band tunneling and increased noticeably when located certain distance from highly doped region because intensified electric field junction. also increases further line is not perpendicular to channel direction but some tilt angle necessarily encompassed critical maximized positioned within protrusion.